H Bharath Bhat
+917892104186
bharathbhat2805@gmail.com
About Me | Experience | Education |
Projects | Contact Me
Namasthe,
Myself Bharath from Bengaluru, Bharat. I'm currently pursuing my Bachelor of Engineering in Electronics and Communication from JSS Academy of Technical Education,
Bengaluru affliated under VTU, Belagavi.
Experience
Indian Institute of Science, Bengaluru
Reasearch Intern ยท November 2023 - April 2024
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Worked under the guidance of Prof. Sumit Kumar Mandal on Energy-Efficient Hardware Accelerators for
Machine Learning Algorithms in the Future Computing Systems (FIST) group within the Computer Science
and Automation Department, IISc, Bengaluru.
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My work also includes contributions to literature on Communication-aware Heterogeneous 2.5D Systems for
Energy-efficient LLM Execution at Edge published at the IEEE Journal on Emerging and Selected Topics in
Circuits and Systems.
Education
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JSS Academy of Technical Education, Bengaluru
Visvesvaraya Technological University (VTU)
B.E in Electronics and Communication Engineering |
Mahesh PU College, Bengaluru
Karnataka State Pre-University Board |
Vidyaniketan Public School
Central Board of Secondary Education |
Projects
Hardware Implementation of Minimally Biased Multipliers
June 2024
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This project involves Hardware Implementation of Minimally Biased Multipliers for Approximate Integer Multiplication using Verilog.
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This project also involves synthesis of the algorithm using tsmc90 technology library on Cadence Genus Tool to analyze area, power and speed.
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github.com/hbharathbhat/minimally_biased_multipliers.git
Tech Fusion Cruiser
January 2024
Hardware Implementation of Systolic Array
August 2023
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This project involves Hardware Implementation of nxn Systolic Array integrated with Softmax Model using Verilog, which was later synthesized using Cadence Design Tool .
Collection of RTL Codes
June 2023
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This hobby project includes a collection of RTL codes, featuring components such as flip-flops, adders, latches, multiplexers, encoders, ALUs, counters, RAMs, ROMs, and more
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github.com/hbharathbhat/rtl_codes.git
Major Course Works
- Digital Design with Verilog, IIT Guwahati
- Introduction to Programming in C, IIT Kanpur
- Hardware Modeling using Verilog, IIT Kharagpur
- C Programming Bootcamp, Udemy
Notes
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